Today, I would like to share something that I have learnt when I was following my Undergraduate degree in Electrical and Electronic Engineering at University of Manchester. It is about the Freescale DSP56321.
The DSP56321 is the fastest member of the DSP563xx family and is ideal for systems requiring a minimum cheap count. Below is a block diagram showing the internal architecture of the device.
Figure : Internal architecture of the Freescale DSP56321[1]
Let’s look at the hardware components briefly.
Memory
The DSP56321 has three internal memory areas, namely program memory (which contains the coding or instructions), x-data memory and y-data memory, and each area of memory has its own data and address bus. These communicate with the outside world using bus multiplexers. The program memory is sub-divided into 32768 words of user programmable RAM and 192 words of bootstrap ROM. This ROM holds a special program that is automatically invoked when the device is reset. The x and y areas of data memory can store up to 40,960 words of user data. This is an extension of the Harvard architecture because many algorithms used in signal processing utilise two distinct signal vectors. For example, FIR (finite impulse response) filters require memory to store the incoming signal and memory to hold filter coefficients and FFT (fast Fourier transform) routines require memory to hold the real and imaginary Fourier components.
The Data ALU
The Arithmetic and Logic Unit (ALU) of the DSP56321 has the task of carrying out the mathematical and logical processing of the data stored in x and y-data memories and contains an enhanced 24-bit fixed-point filter co-processor, which processes using values between -1 and +1. The ALU comprises four 24-bit input registers.
Processor ports
There are five logical ports (A to E) in the DSP56321 which are used for communication with external devices such as memory and interfaces. Each port has a particular designated operation of communication. For example, port A is the memory expansion port that is used when external memory is connected to the processor.
Register control of peripheral systems
This device also contains separate registers that control various peripheral systems. It is possible to modify the operation of a peripheral by loading different control words to these registers.
References
[1] DSP56321 Internal Architecture [ONLINE] Available at:http://cache.freescale.com/files/graphic/block_diagram/DSP56321BD.jpg. [Accessed 19 March 2014].
[2] Lecture Notes by Prof. P. Gaydecki (2013)
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